page: {process_id,page_num,time}
before input:
RAM pages: {0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
DISC pages: {0,99,0},{0,99,0},{0,99,0},{0,99,0},{1,99,0},{1,99,0},{1,99,0},{1,99,0},{2,99,0},{2,99,0},{2,99,0},{2,99,0},{3,99,0},{3,99,0},{3,99,0},{3,99,0}
input:
"0 2 1 3 3 2 2 0 2 1 0 2 3 0"
process 0
process 0 page table: {0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
process 0 page table: {0,0,0 -> {0,99,0->1}},{0,1,0},{0,2,0},{0,3,0} // evict and replace smallest time step in RAM
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
process 2
process 2 page table: {2,99,0},{2,99,0},{2,99,0},{2,99,0}
RAM total: {0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
process 2 page table: {2,99,1},{2,99,0},{2,99,0},{2,99,0}
process 1
process 1 page table: {1,4,0},{1,5,0},{1,6,0},{1,7,0}
RAM total: {0,99,1},{2,99,1},{0,2,0 -> 1,4,0->1},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
process 1 page table: {1,4,1},{1,5,0},{1,6,0},{1,7,0}
process 3
process 3 page table: {3,99,0},{3,99,0},{3,99,0},{3,99,0}
RAM total: {0,99,1},{2,99,1},{1,4,1},{0,3,0 -> 3,99,0->1},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
process 3 page table: {3,99,1},{3,99,0},{3,99,0},{3,99,0}
process 3
process 3 page table: {3,99,1},{3,99,0},{3,99,0},{3,99,0}
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{1,4,0 -> 3,99,0->1},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{1,5,0},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
process 3 page table: {3,99,1},{3,99,1},{3,99,0},{3,99,0}
process 2
process 2 page table: {2,99,0},{2,99,0},{2,99,0},{2,99,0}
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{1,5,0 -> 2,99,0->1},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{1,6,0},{1,7,0} // evict and replace smallest time step in RAM
process 2 page table: {2,99,1},{2,99,1},{2,99,0},{2,99,0}
process 2
process 2 page table: {2,99,1},{2,99,1},{2,99,0},{2,99,0}
RAM total: {0,99,1},{2,99,1},{1,99,1},{3,99,1},{3,99,1},{2,99,1},{1,6,0 -> {2,99,0->1}},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{1,7,0} // evict and replace smallest time step in RAM
process 2 page table: {2,99,1},{2,99,1},{2,99,1},{2,99,0}
process 0
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
RAM total: {0,99,1},{2,99,1},{1,99,1},{3,99,1},{3,99,1},{2,99,1},{1,6,0 -> {0,99,0->1}},{1,7,0} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{1,7,0} // evict and replace smallest time step in RAM
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
process 2
process 2 page table: {2,99,1},{2,99,1},{2,99,1},{2,99,0}
RAM total: {0,99,1},{2,99,1},{1,99,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{1,7,0 -> {2,99,0->1}} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1} // evict and replace smallest time step in RAM
process 2 page table: {2,99,1},{2,99,1},{2,99,1},{2,99,1}
process 1
process 1 page table: {1,4,1},{1,5,0},{1,6,0},{1,7,0}
RAM total: {0,99,1 -> {1,5,0->1}},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{2,99,1} // evict and replace smallest time step in RAM
RAM total: {1,5,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1}
process 1 page table: {1,4,1},{1,5,1},{1,6,0},{1,7,0}
process 0
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
RAM total: {{1,5,1} -> {0,99,0->1}},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{2,99,1} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1}
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
process 2
process 2 page table: {2,99,1},{2,99,1},{2,99,1},{2,99,1}
RAM total: {0,99,1 -> {2,99,0->1}},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1} // evict and replace smallest time step in RAM
RAM total: {2,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1}
process 2 page table: {2,99,1},{2,99,1},{2,99,1},{2,99,1}
process 3
process 3 page table: {3,99,1},{3,99,1},{3,99,0},{3,99,0}
RAM total: {2,99,1 -> {3,99,0->1}},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1} // evict smallest time step from RAM
RAM total: {3,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{0,99,1},{2,99,1} // bring in least recently used page into RAM
process 3 page table: {3,99,1},{3,99,1},{3,99,1},{3,99,0}
process 0
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
RAM total: {3,99,1 -> {0,99,0->1}},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{2,99,1} // evict and replace smallest time step in RAM
RAM total: {0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{2,99,1} // evict and replace smallest time step in RAM
process 0 page table: {0,99,1},{0,1,0},{0,2,0},{0,3,0}
{0,99,1},{2,99,1},{1,4,1},{3,99,1},{3,99,1},{2,99,1},{2,99,1},{2,99,1}
my output
0 99 1 2 3
1 4 5 6 7
2 99 99 99 99
3 99 99 99 99
0,99,1;2,99,1;1,4,1;3,99,1;3,99,1;2,99,1;2,99,1;2,99,1;
correct output
0 99 99 99
1 99 99 99
2 99 99 99
3 99 99 99
0,0,0;0,0,0;1,0,1;1,0,1;2,0,2;2,0,2;3,0,3;3,0,3;Empty;Empty;Empty;Empty;Empty;Empty;Empty;Empty;
This is really hard to read and hard to know what question you are asking.
I mean for one, your output doesn't print empty slots. It also doesn't print the same slot twice. The structure for some reason has 99 in it? 99 should only be used in the page table. Maybe try reading the project specification slowly.
before receiving input the project specifications say:
"We have a computer whose RAM is an array of size 16. It is an array
of pointers. There are 8 page frames in the RAM, each consisting of two
contiguous locations in the array. Hence, the page size of this computer is 2"
this means that there will be 8 pages in the RAM
"Each process has a page table, which is an integer array,
entry of a process page table indicates whether the page is in RAM or in the
virtual memory (on disc), k if the page is in RAM (k is the frame number,
between 0 . . . 7)"
"Initialise the process id and page num with the id of the process (a
number between 0 . . . 3) and a page number of that process (a number
between 0 . . . 3). Initialise all last access to 0." - there can be 8 RAM in memory so it having page numbers 0-3 doesn't make sense because they can't be uniquely identified, it has to be 0-7 (like mentioned earlier with the frame number)
this means that all time steps are 0, since each process has 4 pages there will need to be 2 different processes in the RAM (starting with 0 and 1) and each page number starts off unique (0-7)
page: {process_id,page_num,time}
RAM pages: {0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
"The virtual memory of this computer is an array of pointers of size 32
(We will pretend it is on disc, but actually it is an array in the RAM of
our computer)"
this means that there will be 16 pages in disc
"(k is the frame number,
between 0 . . . 7), and 99 if the page is in disc (99 cannot be a frame number)."
this means initialise the disc with page numbers of 99
"There are 4 processes in this computer, and each process can
have 4 pages, and obviously all the pages of all the processes cannot be in
the main memory at the same time. Some pages will be in the main memory
and some pages will be in the virtual memory at any time. The processes are
numbered 0 . . . 3."
on a different article you mentioned that disc cannot be written to which means it will need 4 pages from each process. For each of the four processes initialise disc memory with page num 99 and time step 0
DISC pages: {0,99,0},{0,99,0},{0,99,0},{0,99,0},{1,99,0},{1,99,0},{1,99,0},{1,99,0},{2,99,0},{2,99,0},{2,99,0},{2,99,0},{3,99,0},{3,99,0},{3,99,0},{3,99,0}
"The simulation starts by reading a file where there is a single line of
integers separated by blanks, for example:
0 2 1 3 3 2 2 0 2 1 0 2 3 0"
this means the first instruction is 0
since all have the same time step go left to right
process 0 page table: {0,0,0},{0,1,0},{0,2,0},{0,3,0}
{0,0,0} is leftmost
you mentioned on a different article if all of process 0 is loaded in from RAM we evict it from RAM
RAM pages: {},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
"Each integer indicates a process id. For example, the first number 0 indicates that the next page of process 0 has to be brought in from virtual
memory to the RAM"
DISC pages with process 0: {0,99,0},{0,99,0},{0,99,0},{0,99,0}
next page of process 0: {0,99,0}
RAM pages: {0,99,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
RAM pages: {0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // increment time step
"The process table of process 0 and the RAM have to
be updated accordingly. "
process 0 page table:
{0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // old one
{0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // changes to this
this is repeated with all of the other instructions
> before receiving input the project specifications say:
> "We have a computer whose RAM is an array of size 16. It is an array
> of pointers. There are 8 page frames in the RAM, each consisting of two
> contiguous locations in the array. Hence, the page size of this computer is 2"
>
> this means that there will be 8 pages in the RAM
There will be a maximum of 8 pages in RAM.
> "Each process has a page table, which is an integer array,
> entry of a process page table indicates whether the page is in RAM or in the
> virtual memory (on disc), k if the page is in RAM (k is the frame number,
> between 0 . . . 7)"
>
> "Initialise the process id and page num with the id of the process (a
> number between 0 . . . 3) and a page number of that process (a number
> between 0 . . . 3). Initialise all last access to 0." - there can be 8 RAM in memory so it having page numbers 0-3 doesn't make sense because they can't be uniquely identified, it has to be 0-7 (like mentioned earlier with the frame number)
It does make sense. You can identify a specific page by its process id and page number.
> this means that all time steps are 0, since each process has 4 pages there will need to be 2 different processes in the RAM (starting with 0 and 1) and each page number starts off unique (0-7)
Why will there need to be 2 different processes in RAM? Technically a page from each process can be in RAM. Unless you are placing all of the process pages into RAM. Also doesn't necessarily have to be 0 or 1, depends on the input file. Page numbers are from 0-3 not 0-7. 0-7 is the slot numbers in the RAM not the page numbers.
> page: {process_id,page_num,time}
> RAM pages: {0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
>
>
> "The virtual memory of this computer is an array of pointers of size 32
> (We will pretend it is on disc, but actually it is an array in the RAM of
> our computer)"
>
> this means that there will be 16 pages in disc
Yes.
> "(k is the frame number,
> between 0 . . . 7), and 99 if the page is in disc (99 cannot be a frame number)."
>
> this means initialise the disc with page numbers of 99
That is not what it means. It means you initialize the page table for all pages to be 99. As 99 means the page is not in RAM only in virtual memory.
> "There are 4 processes in this computer, and each process can
> have 4 pages, and obviously all the pages of all the processes cannot be in
> the main memory at the same time. Some pages will be in the main memory
> and some pages will be in the virtual memory at any time. The processes are
> numbered 0 . . . 3."
>
> on a different article you mentioned that disc cannot be written to which means it will need 4 pages from each process. For each of the four processes initialise disc memory with page num 99 and time step 0
I don't understand why you are initializing everything in the disk with 99.
> DISC pages: {0,99,0},{0,99,0},{0,99,0},{0,99,0},{1,99,0},{1,99,0},{1,99,0},{1,99,0},{2,99,0},{2,99,0},{2,99,0},{2,99,0},{3,99,0},{3,99,0},{3,99,0},{3,99,0}
>
> "The simulation starts by reading a file where there is a single line of
> integers separated by blanks, for example:
> 0 2 1 3 3 2 2 0 2 1 0 2 3 0"
>
> this means the first instruction is 0
> since all have the same time step go left to right
> process 0 page table: {0,0,0},{0,1,0},{0,2,0},{0,3,0}
> {0,0,0} is leftmost
> you mentioned on a different article if all of process 0 is loaded in from RAM we evict it from RAM
> RAM pages: {},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
I think you misunderstood. Only if we are trying to load a new page onto RAM and RAM is full then we evict a process to make space.
> "Each integer indicates a process id. For example, the first number 0 indicates that the next page of process 0 has to be brought in from virtual
> memory to the RAM"
> DISC pages with process 0: {0,99,0},{0,99,0},{0,99,0},{0,99,0}
>
> next page of process 0: {0,99,0}
Structure of pages should be: {process id, page number, last accessed time}. Not sure what parameters you are using here to represent your pages.
> RAM pages: {0,99,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0}
> RAM pages: {0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // increment time step
>
> "The process table of process 0 and the RAM have to
> be updated accordingly. "
> process 0 page table:
> {0,0,0},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // old one
> {0,99,1},{0,1,0},{0,2,0},{0,3,0},{1,4,0},{1,5,0},{1,6,0},{1,7,0} // changes to this
>
> this is repeated with all of the other instructions
If you are still confused, please come into a lab session to discuss it with a facilitator. It is really hard to explain over the forum especially because there is a lot to explain.