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help5507

This forum is provided to promote discussion amongst students enrolled in CITS5507 High Performance Computing.

Please consider offering answers and suggestions to help other students! And if you fix a problem by following a suggestion here, it would be great if other interested students could see a short "Great, fixed it!"  followup message.

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 UWA week 38 (2nd semester, week 8) ↓
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1:31pm Tue 17th Sep, ANONYMOUS

Well actually it would usually make sense. Pretend we have 1 thread and 1 core. Every time one of the items in a row or column of the matrix needs to be accessed, that data needs to be pulled from the RAM or a cache into the CPU, this can take hundreds of CPU cycles. During these cycles, the CPU is typically idle, waiting for the data to arrive. If there were two threads however, the second could have already preloaded its data in the cache so that when thread 1 is finished executing and needs to recall the next piece of data, the CPU can immediately switch to thread 2 and consume that one's preloaded data, while waiting for thread 1 to retrieve more data from the RAM.

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