"Lewei Xu" <23*0*0*8@s*u*e*t*u*a*e*u*a*> wrote: Yes, thank you lab fac. We don't get enough chance to discuss this in our lectures, and rushed over it because there's so many different types of devices and how they interact with the data-bus (and, in fact, modern systems will have several data-buses operating with different protocols, and at different speeds). In our project, the system-calls of read and write are copying data between a device and RAM. But we've kept the project simpler by not expressly considering RAM transfers (or even cache). As part of (our project's) state transition, the OS can instruct the relevant device to record the number of bytes to transfer (and to/from where), and the device will be informed by the data-bus, itself, when the bus becomes available. Then the devices, amongst themselves, who gets to own the bus. So the data-bus acquisition time (or data transfer time) does not involve the CPU for either the process or the OS.